Job Summary
This role focuses on overseeing every stage of pre-silicon verification. The primary objective is to develop comprehensive test plans, create necessary environments, and guarantee a flawless initial silicon outcome for IP designs. Additionally, the position incorporates the application of advanced methodologies and LLM technologies to enhance execution quality and monitor progress through various metrics.
Responsibilities
- Manage all aspects of pre-silicon verification.
- Develop detailed test plans and create verification environments.
- Ensure the delivery of bug-free first silicon for IP designs.
- Utilize advanced methodologies to enhance verification processes.
- Employ LLM technologies to track project execution and quality metrics.
Qualifications
- Bachelor’s degree in a technical discipline.
- Minimum of 10 years of relevant experience in the industry.
- Strong expertise in SystemVerilog and UVM.
- Solid understanding of verification methodologies and practices.
- Experience with scripting languages and hardware communication protocols.
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