San Jose, California, 95113

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Full Time
Onsite
$210000 - $275000/yr

Job Summary

The role focuses on spearheading the development, initiation, and validation strategies for ASIC SerDes and PCIe PHY products, overseeing the process from initial concept to mass production. This position requires a collaborative effort with multidisciplinary engineering teams to tackle intricate technical challenges and deliver high-performance connectivity solutions.

Responsibilities

  • Lead the end-to-end development and validation processes for ASIC SerDes and PCIe PHY products.
  • Collaborate with cross-functional teams to address and resolve complex engineering issues.
  • Drive the technical aspects of product development to ensure optimal performance and reliability.
  • Develop and implement testing methodologies to validate PHY performance.

Qualifications

  • Bachelor’s degree in Electrical Engineering.
  • 12-15+ years of substantial experience in high-speed PHY validation.
  • Demonstrated technical leadership capabilities in engineering projects.
  • Hands-on experience with lab equipment and automation techniques crucial for testing and validation.

Astera Labs provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state or local laws.
To apply for this job, please upload your resume.
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Back to Top Director Post-Si Electrical Validation Engineering
Director Post-Si Electrical Validation Engineering
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