Job Summary
The role involves the verification of intricate digital intellectual properties (IPs) through the development of detailed verification plans and the implementation of testbenches using UVM (Universal Verification Methodology) alongside System Verilog. The position necessitates close collaboration with architects and designers to troubleshoot test failures while guaranteeing both functional and code coverage in preparation for tapeout.
Responsibilities
- Create and implement verification plans for complex digital IPs.
- Develop testbenches utilizing UVM and System Verilog.
- Collaborate with architects and designers to resolve test failures.
- Ensure functional and code coverage for successful tapeout readiness.
Qualifications
- Bachelor’s degree in a relevant field.
- A minimum of 3 years of experience in the industry.
- Strong understanding of digital design principles.
- Familiarity with computer architecture.
- Proficiency in object-oriented programming.
Apple provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state or local laws.
