Job Summary
The primary focus of this position is to manage pre-silicon verification tasks. This includes the creation of comprehensive test plans and validation environments, aiming to achieve flawless initial silicon for IP designs. The individual will actively execute verification strategies, troubleshoot test failures, and use metrics to monitor progress, while also integrating LLM technologies to enhance efficiency.
Responsibilities
- Develop and implement test plans to validate IP designs.
- Create and maintain verification environments.
- Execute defined verification plans and analyze results.
- Debug any test failures that arise during execution.
- Utilize metrics to track verification progress.
- Leverage LLM technologies to improve verification processes.
Qualifications
- Bachelor’s degree in a technical discipline.
- Minimum of 3 years of experience in a relevant industry role.
- Strong understanding of Object-Oriented Programming (OOP).
- Proficient in SystemVerilog and UVM.
- Experience with verification methodologies and scripting languages.
