Job Summary
This role focuses on the verification and upkeep of high-performance FPGA computing and networking systems utilized in electronic trading. The candidate will engage in all aspects of the verification lifecycle, from creating test plans and developing testbenches to executing tests and ensuring coverage closure.
Responsibilities
- Engage in the verification process for FPGA systems, contributing to planning and execution.
- Develop testbenches and perform thorough testing to validate designs.
- Ensure comprehensive coverage closure throughout the verification phases.
Qualifications
- Bachelor’s or Master’s degree in a relevant engineering discipline.
- Minimum of 2 years’ experience in FPGA or ASIC design verification.
- Proficiency in SystemVerilog is essential.
- Familiarity with simulation and debugging tools is required.
HPR provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state or local laws.
