Validate and characterize complex ASICs and SoCs from first silicon through production release, including functionality, performance, interoperability, compliance, reliability, and high-speed interfaces. Debug hardware, firmware, and system-level issues; develop Python-based validation automation; and document results while collaborating with engineering teams and customers. Candidates need hands-on post-silicon validation, design verification, or silicon bring-up experience, knowledge of silicon debug and high-speed protocols, and Python programming skills. A relevant bachelor’s or master’s degree or equivalent experience is required, along with the ability to interpret schematics and work onsite full-time in Irvine or Ottawa.
Celero Communications, Inc. provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state or local laws.
