San Jose, California, 95113

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Full Time
Onsite
$204000 - $250000/yr

Job Summary

This position is focused on leading signal integrity (SI), power integrity (PI), and package/power delivery network (PDN) co-design efforts across chip, package, and board interfaces. The successful candidate will drive the methodology from the initial planning stages through to final signoff, working closely with cross-functional teams to ensure the development of reliable high-speed connections and effective power delivery systems.

Responsibilities

  • Lead the signal and power integrity analysis across multiple design domains.
  • Collaborate with various teams to develop and maintain robust high-speed link solutions.
  • Oversee methodology development from early project phases to final signoff.
  • Ensure stable power delivery throughout the chip, package, and board interfaces.
  • Translate system-level requirements into practical engineering constraints.

Qualifications

  • A minimum of 10 years of practical experience in delivering SI, PI, and package/PDN solutions for complex System on Chips (SoCs).
  • Strong understanding of transmission line theory, S-parameters, and power delivery mechanisms.
  • Demonstrated capability to convert system requirements into effective design constraints.

TYLsemi provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state or local laws.
To apply for this job, please upload your resume.
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Senior Staff SI/PI Engineer
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supports..pdf, .doc, .docx, or .txt file