Job Summary
The position focuses on the development of low-level firmware and control loops tailored for high-speed physical-layer communication silicon, aimed at enhancing AI/ML hardware acceleration capabilities. This role is instrumental in crafting firmware roadmaps, constructing diagnostic systems, and facilitating smooth integration between hardware pipelines and the overarching global AI infrastructure.
Responsibilities
- Architect low-level firmware and control loops for high-speed communication systems.
- Define and maintain firmware roadmaps to align with project objectives.
- Design and implement diagnostic systems for performance evaluation and troubleshooting.
- Ensure effective integration between hardware components and AI infrastructures.
Qualifications
- A bachelor’s degree in a relevant technical discipline.
- A minimum of 10 years of experience in the embedded systems or digital signal processing sectors.
- Strong proficiency in C/C++ programming languages.
- Prior experience with high-speed physical-layer interfaces or communication subsystems.
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