Job Summary
The engineer will be responsible for leading the verification of performance and correlating results between RTL and performance models specifically for RISC-V CPUs. This role involves significant collaboration with architects to pinpoint performance bottlenecks, create microbenchmarks, and improve performance analysis techniques.
Responsibilities
- Facilitate performance verification and correlation between RTL and performance models for RISC-V CPUs.
- Work alongside architects to detect and address performance bottlenecks.
- Develop microbenchmarks to assess CPU performance effectively.
- Advance methodologies for performance analysis to improve accuracy and efficiency.
Qualifications
- Proven experience in analyzing contemporary CPU performance data.
- Strong programming skills in C++ and Python.
- Extensive knowledge of CPU microarchitecture.
- Expertise in debugging within RTL and logic environments.
Tenstorrent provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state or local laws.
